數(shù)據(jù)轉(zhuǎn)換器

前言

　　模擬與數(shù)字的接口，是連接模擬信號和數(shù)字信號的橋梁，其性能的提高變得越來越重要。接口技術(shù)的集中體現(xiàn)是數(shù)據(jù)轉(zhuǎn)換器，包括ADC和DAC。按集成電路的傳統(tǒng)劃分，它歸類于模擬電路，許多教科書從模擬信號處理的角度闡述了數(shù)據(jù)轉(zhuǎn)換器的原理、技術(shù)要求和設(shè)計(jì)等。而實(shí)際上，高性能的數(shù)據(jù)轉(zhuǎn)換器，已成為名副其實(shí)的混合信號電路（數(shù)模混合電路）。除了∑一△ADC外，還有為提高性能而采用數(shù)字技術(shù)（例如實(shí)現(xiàn)各種數(shù)字校準(zhǔn)算法）的數(shù)據(jù)轉(zhuǎn)換器都包含了數(shù)字電路。對混合信號電路的分析與設(shè)計(jì)，必須采用模擬信號處理與數(shù)字信號處理相結(jié)合的理論與方法。在這類電路的設(shè)計(jì)中，不僅要進(jìn)行電路級的仿真，還要對理想轉(zhuǎn)換器及各組成模塊建立模型，并使用適當(dāng)精度的模型和行為級的仿真工具（例如Matlab），對數(shù)據(jù)轉(zhuǎn)換器的性能和行為進(jìn)行定量驗(yàn)證。建模中，必須對影響轉(zhuǎn)換器性能的各種因素進(jìn)行深入分析，例如，ADC中采樣和量化等過程均會(huì)產(chǎn)生各種噪聲，這些噪聲對SNR的影響都應(yīng)進(jìn)行專門的數(shù)值模擬；有的時(shí)候，還要考慮模擬域與數(shù)字域之間的相互作用。數(shù)字信號處理在轉(zhuǎn)換器中的應(yīng)用，不僅體現(xiàn)在設(shè)計(jì)和設(shè)計(jì)的驗(yàn)證方面，而且體現(xiàn)在測試的驗(yàn)證方面。轉(zhuǎn)換器性能的測試和對測試數(shù)據(jù)的處理，沒有數(shù)字信號處理的技術(shù)的支持，則無法進(jìn)行。

內(nèi)容概要

本書是第一本從模擬和數(shù)字兩種信號處理相結(jié)合的角度全面地論述數(shù)據(jù)轉(zhuǎn)換器的研究生教材。在模擬一數(shù)字接口技術(shù)方面，數(shù)字電子技術(shù)的進(jìn)步已經(jīng)在許多層面上推動(dòng)了該技術(shù)的發(fā)展并提供了有效的支持；而關(guān)于這些內(nèi)容的教學(xué)的和自學(xué)的教材一直是缺失的，這些層面包括：技術(shù)規(guī)范，轉(zhuǎn)換方法和體系結(jié)構(gòu)，電路設(shè)計(jì)和測試等。    在對必要的背景理論基礎(chǔ)進(jìn)行研究之后，本書涉及并提供了深入且全面的知識(shí)。每章中引導(dǎo)性資料以及眾多的實(shí)例加強(qiáng)了本書的廣度和深度，大多數(shù)實(shí)例是以行為仿真的形式給出的。這些例題和章末的習(xí)題有助于理解相關(guān)內(nèi)容，有利于使用某些工具進(jìn)行自我練習(xí)，這些工具對培訓(xùn)和設(shè)計(jì)工作都是很有效的。    《數(shù)據(jù)轉(zhuǎn)換器》對工程技術(shù)人士也是一本必不可少的教科書，因?yàn)樗鼜浹a(bǔ)了本專題的資料缺乏系統(tǒng)化、條理化的不足。本書設(shè)想讀者已具備模擬和數(shù)字電路的扎實(shí)基礎(chǔ)；具有使用電路和行為分析的仿真工具的基礎(chǔ)。具有統(tǒng)計(jì)分析的基礎(chǔ)也是有用的，但不是絕對必要的。

書籍目錄

DedicationPreface1. BACKGROUND ELEMENTS  1.1  The Ideal Data Converter  1.2  Sampling    1.2.1  Undersampling    1.2.2  Sampling-time Jitter  1.3  Amplitude Quantization    1.3.1  Quantization Noise    1.3.2  Properties of the Quantization Noise  1.4  kT/C Noise  1.5  Discrete and Fast Fourier Transforms    1.5.1  Windowing  1.6  Coding Schemes  1.7  The D/A Converter    1.7.1  Ideal Reconstruction    1.7.2  Real Reconstruction  1.8  The Z-Transform  References2. DATA CONVERTERS SPECIFICATIONS  2.1  Type of Converter  2.2  Conditions of Operation  2.3  Converter Specifications    2.3.1  General Features  2.4  Static Specifications  2.5  Dynamic Specifications  2.6  Digital and Switching Specifications  References3.  NYQUIST-RATE D/A CONVERTERS  3.1  Introduction    3.1.1  DAC Applications    3.1.2  Voltage and Current References  3.2  Types of Converters  3.3  Resistor based Architectures    3.3.1  Resistive Divider    3.3.2  X-Y Selection    3.3.3  Settling of the Output Voltage    3.3.4  Segmented Architectures    3.3.5  Effect of the Mismatch    3.3.6  Trimming and Calibration    3.3.7  Digital Potentiometer    3.3.8  R-2R Resistor Ladder DAC    3.3.9  Deglitching  3.4  Capacitor Based Architectures    3.4.1  Capacitive Divider DAC    3.4.2  Capacitive MDAC    3.4.3  "Flip Around" MDAC    3.4.4  Hybrid Capacitive-Resistive DACs  3.5  Current Source based Architectures    3.5.1  Basic Operation    3.5.2  Unity Current Generator    3.5.3  Random Mismatch with Unary Selection    3.5.4  Current Sources Selection    3.5.5  Current Switching and Segmentation    3.5.6  Switching of Current Sources  3.6  Other Architectures  References4.  NYQUIST RATE A/D CONVERTERS  4.1  Introduction  4.2  Timing Accuracy    4.2.1  Metastability error  4.3  Full-Flash Converters    4.3.1  Reference Voltages    4.3.2  Offset of Comparators    4.3.3  Offset Auto-zeroing    4.3.4  Practical Limits  4.4  Sub-Ranging and Two-Step Converters    4.4.1  Accuracy Requirements    4.4.2  Two-step Converter as a Non-linear Process  4.5  Folding and Interpolation    4.5.1  Double Folding    4.5.2  Interpolation    4.5.3  Use of Interpolation in Flash Converters    4.5.4  Use of Interpolation in Folding Architectures    4.5.5  Interpolation for Improving Linearity  4.6  Time-Interleaved Converters    4.6.1  Accuracy requirements  4.7  Successive Approximation Converter    4.7.1  Errors and Error Correction    4.7.2  Charge Redistribution  4.8  Pipeline Converters    4.8.1  Accuracy Requirements    4.8.2  Digital Correction    4.8.3  Dynamic Performances    4.8.4  Sampled-data Residue Generator  4.9  Other Architectures    4.9.1  Cyclic (or Algorithmic) Converter    4.9.2  Integrating Converter    4.9.3  Voltage-to-Frequency Converter  References5. CIRCUITS FOR DATA CONVERTERS  5.1  Sample-and-Hold  5.2  Diode Bridge S&H    5.2.1  Diode Bridge Imperfections    5.2.2  Improved Diode Bridge  5.3  Switched Emitter Follower    5.3.1  Circuit Implementation    5.3.2  Complementary Bipolar S&H  5.4  Features of S&Hs with BJT  5.5  CMOS Sample-and-Hold    5.5.1  Clock Feed-through    5.5.2  Clock Feed-through Compensation    5.5.3  Two-stages OTA as T&H    5.5.4  Use of the Virtual Ground in CMOS S&H    5.5.5  Noise Analysis  5.6  CMOS Switch with Low Voltage Supply    5.6.1  Switch Bootstrapping  5.7  Folding Amplifiers    5.7.1  Current-Folding    5.7.2  Voltage Folding  5.8  Voltage-to-Current Converter  5.9  Clock Generation  References6. OVERSAMPLING AND LOW ORDER EA MODULATORS  6.1  Introduction    6.1.1  Delta and Sigma-Delta Modulation  6.2  Noise Shaping  6.3  First Order Modulator    6.3.1  Intuitive Views    6.3.2  Use of 1-bit Quantization  6.4  Second Order Modulator  6.5  Circuit Design Issues    6.5.1  Offset    6.5.2  Finite Op-Amp Gain    6.5.3  Finite Op-Amp Bandwidth    6.5.4  Finite Op-Amp Slew-Rate    6.5.5  ADC Non-ideal Operation    6.5.6  DAC Non-ideal Operation  6.6  Architectural Design Issues    6.6.1  Integrator Dynamic Range    6.6.2  Dynamic Ranges Optimization    6.6.3  Sampled-data Circuit Implementation    6.6.4  Noise Analysis    6.6.5  Quantization Error and Dithering    6.6.6  Single-bit and Multi-bit  References7. HIGH-ORDER, CT EA CONVERTERS AND EA DAC  7.1  SNR Enhancement  7.2  High Order Noise Shaping    7.2.1  Single Stage Architectures    7.2.2  Stability Analysis    7.2.3  Weighted Feedback Summation    7.2.4  Modulator with Local Feedback    7.2.5  Chain of Integrators with Distributed Feedback    7.2.6  Cascaded EA Modulator    7.2.7  Dynamic range for MASH  7.3  Continuous-time EA Modulators    7.3.1  S&H Limitations    7.3.2  CT Implementations    7.3.3  Design of CT from Sampled-Data Equivalent  7.4  Band-Pass EA Modulator    7.4.1  Interleaved N-Path Architecture    7.4.2  Synthesis of the NTF  7.5  Oversampling DAC    7.5.1  1-bit DAC    7.5.2  Double Return-to-zero DAC  References8. DIGITAL ENHANCEMENT TECHNIQUES  8.1  Introduction  8.2  Error Measurement  8.3  Trimming of Elements  8.4  Foreground Calibration  8.5  Background Calibration    8.5.1  Gain and Offset in Interleaved Converters    8.5.2  Offset Calibration without Redundancy  8.6  Dynamic Matching    8.6.1  Butterfly Randomization    8.6.2  Individual Level Averaging    8.6.3  Data Weighted Averaging  8.7  Decimation and Interpolation    8.7.1  Decimation    8.7.2  Interpolation   References9.  TESTING OF D/A AND A/D CONVERTERS  9.1  Introduction  9.2  Test Board  9.3  Quality and Reliability Test  9.4  Data Processing    9.4.1  Best-fit-line    9.4.2  Sine Wave Fitting    9.4.3  Histogram Method  9.5  Static DAC Testing    9.5.1  Transfer Curve Test    9.5.2  Superposition of Errors    9.5.3  Non-linearity Errors  9.6  Dynamic DAC Testing    9.6.1  Spectral Features    9.6.2  Conversion Time    9.6.3  Glitch Energy  9.7  Static ADC Testing    9.7.1  Code Edge Measurement  9.8  Dynamic ADC Testing    9.8.1  Time Domain Parameters    9.8.2  Improving the Spectral Purity of Sine Waves    9.8.3  Aperture Uncertainty Measure    9.8.4  Settling-time Measure    9.8.5  Use of FFT for Testing   ReferencesIndex

章節(jié)摘錄

　　TheoccurrenceoftonesmeansthatthepowerofthequantizationerrorisconcentratedatspecificfrequenciesinsteadofbeingspreadovertheNyquistinterval.Thehigh-passnoisetransferfunctioneventuallyreducestheamplitudeofthetonesthatfallinthesignalband.However，thesituationremainsproblematicbecausealargequantizationnoisepowercausesbigtonesthat，despitetheattenuation，canbecomparablewithsmallsinewavecomponentsoftheinput.　　Althoughasmallsinewavecorruptedbynoisecanbemadevisiblebyreducingthebandwidthofthemeasurefilter（asithappenswhenusingalongfftsequence），incontrasthowever，thepoweroftonesdoesnotdiminishwiththebandwidthoftheband-passfilteracrossitandcanoftenmaskthesmallsinewavelocatedatthesameoratnearfrequencies.

編輯推薦

　　·為使讀者能清晰地理解采樣、量化、采樣數(shù)據(jù)系統(tǒng)中的噪聲，《數(shù)據(jù)轉(zhuǎn)換器（影印版）》涵蓋了這方面必需的所有基礎(chǔ)知識(shí)；涵蓋了采樣數(shù)據(jù)線性系統(tǒng)中的數(shù)學(xué)工具?！　　と娑x了用于描述數(shù)據(jù)轉(zhuǎn)換器的參數(shù)，這些參數(shù)的定義對理解轉(zhuǎn)換器產(chǎn)品數(shù)據(jù)手冊是必要的?！　　ずw了奈奎斯特率數(shù)據(jù)轉(zhuǎn)換器的所有架構(gòu)，詳細(xì)研究了其特點(diǎn)、限制和設(shè)計(jì)技術(shù)?！　　ぴ敿?xì)研究了過采樣和sigma．Delta轉(zhuǎn)換器，利用仿真例子和頻譜圖，直方圖來幫助讀者更清楚地理解噪聲整形的特性和限制?！　　ずw了提高數(shù)據(jù)轉(zhuǎn)換器性能的數(shù)字校正和數(shù)字校準(zhǔn)技術(shù)?！　　な褂美碚摵椭庇^的觀點(diǎn)解釋電路和系統(tǒng)的工作及限制。　　·涵蓋了測試方法和用于測試和表征轉(zhuǎn)換器性能的數(shù)據(jù)處理技術(shù)。　　·在例題和習(xí)題集中廣泛使用Simulink和Marlab，以幫助讀者理解并促進(jìn)深入研究。

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