出版時(shí)間:2002-11 出版社:清華大學(xué)出版社 作者:霍斯普爾 頁數(shù):232
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內(nèi)容概要
本書涵蓋了專用集成電路(ASIC)設(shè)計(jì)的主要關(guān)鍵問題。詳細(xì)講述了ASIC設(shè)計(jì)各主要階段關(guān)鍵的技術(shù)問題和可能遇到的組織管理問題。其中,技術(shù)上著重介紹了設(shè)計(jì)復(fù)用、高質(zhì)量設(shè)計(jì)、編碼技巧和綜合指導(dǎo)原則。在管理方面主要講述了項(xiàng)目組的組建,項(xiàng)目實(shí)施的規(guī)劃,如何減少風(fēng)險(xiǎn)以及如何處理和ASIC廠商之間的關(guān)系等等。本書所描述的技術(shù)和方法學(xué)可以顯著縮短ASIC設(shè)計(jì)周期,提高設(shè)計(jì)質(zhì)量。既適合ASIC設(shè)計(jì)工程師,也ASIC項(xiàng)目負(fù)責(zé)人閱讀。對(duì)于想要了解ASIC設(shè)計(jì)流程的讀者,也有很好的借鑒意義。
書籍目錄
PrefaceAcknoledgmentsChapter 1·Phases of an Asic Project 1.1 Introduction 1.2 List of Phases 1.3 Prestudy Phase 1.4 Top-Lelvel Design Phase 1.5 Module Specification Phase 1.6 Module Design 1.7 Subsysterm Simulation 1.8 Syestem Simulation/Synthesis 1.9 Layout and Backend Phase 1.10 Postlayout Simulation/Synthesis 1.11 ASIC Sign-Off 1.12 Preparation for Testing Silicon 1.13 Testing of Silion 1.14 SummaryChapter 2·Design Reuse and System-on-a-Chip Designs 2.1 Introduction 2.2 Reuese Documentation 2.3 Tips and Guidelines for Reuse 2.4 SoC and Third-Party IP Integration 2.5 System-Level Design Languages 2.6 Virtual Socket Interface Alliance 2.7 SummaryChapter 3·A Quality Design ApproachChapter 4·Tips and GuidelinesChapter 5·ASIC Simulation and TestbenchesChapter 6·SynthesisChapter 7·Quality FrameworkChapter 8·Planning and Tracking ASIC ProjectsChapter 9·Reducing Project RisksChapter 10·Dealing with the ASIC VendorChapter 11·Motivationa and People ManagementChapter 12·The TeamChapter 13·Project Manager SkillsChapter 14·Design ToolsBibliographyAbout the AuthorsIndex
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