數(shù)字集成電路設(shè)計(jì)

前言

　　Why this book?　　Designing integrated electronics has become a multisciplinary enterprise that involves solving problems from fields as disparate as　　·Hardware architecture　　·Software engineering　　·Marketing and investment　　·Solid-state physics　　·Systems engineering　　·Circuit design　　·Discrete mathematics　　·Electronic design automation　　·Layout design　　·Hardware test equipment and measurement techniques　　Covering all these subjects is clearly beyond the scope of this text and also beyond the authors proficiency．Yet，I have made an attempt to collect material from the above fields that I have found to be relevant for deciding whether or not to develop digital Very Large Scale Integration(VLSI) circuits，for making major design decisions，and for carrying out the actual engineering work． The present volume has been written with two audiences in mind．As a textbook．it wants to intro- duce engineering students to the beauty and the challenges of digital VLSI design while preventing them from repeating mistakes that others have made before．Practising electronics engineers should find it appealing as a reference book because of its comprehensiveness and the many tables，check- lists，diagrams，and case studies intended to help them not to overlook important action items and alternative options when planning to develop their own hardware components．　　What sets this book apart from others in the field is its top-down approach．Beginning with hardware architectures，rather than with solid。state physics，naturally follows the normal VLSI design flow and makes the material more accessible to readers with a background in systems engineering， information technology，digital signal processing，or management．

內(nèi)容概要

　　本書從架構(gòu)與算法講起，介紹了功能驗(yàn)證、VHDL建模、同步電路設(shè)計(jì)、異步數(shù)據(jù)獲取、能耗與散熱、信號(hào)完整性、物理設(shè)計(jì)、設(shè)計(jì)驗(yàn)證等必備技術(shù)，還講解了VLSI經(jīng)濟(jì)運(yùn)作與項(xiàng)目管理，并簡(jiǎn)單闡釋了CMOS技術(shù)的基礎(chǔ)知識(shí)，全面覆蓋了數(shù)字集成電路的整個(gè)設(shè)計(jì)開發(fā)過程?！　”緯瓤勺鳛楦叩仍盒Ｎ㈦娮?、電子技術(shù)等相關(guān)專業(yè)高年級(jí)師生和研究生的參考教材，也可供半導(dǎo)體行業(yè)工程師參考。

作者簡(jiǎn)介

　　Hubert Kaeslin，1985年于瑞士蘇黎世聯(lián)邦理工學(xué)院獲得博士學(xué)位，現(xiàn)為該校微電子設(shè)計(jì)中心的負(fù)責(zé)人，具有20多年教授VLSI的豐富經(jīng)驗(yàn)。

書籍目錄

Chapter 1　Introduction to Microelectronics　　1.1　Economic impact　　1.2　Concepts and terminology　　　1.2.1　The Guinness book of records point of view　　　1.2.2　The marketing point of view　　　1.2.3　The fabrication point of view　　　1.2.4　The design engineer's point of view　　　1.2.5　The business point of view　　1.3　Design flow in digital VLSI　　　1.3.1　The Y-chart, a map of digital electronic systems　　　1.3.2　Major stages in VLSI design　　　1.3.3　Cell libraries　　　1.3.4　Electronic design automation software　　1.4　Field-programmable logic　　　1.4.1　Configuration technologies　　　1.4.2　Organization of hardware resources　　　1.4.3　Commercial products　　1.5　Problems　　1.6　Appendix I: A brief glossary of logic families　　1.7　Appendix II: An illustrated glossary of circuit-related terms　Chapter 2　From Algorithms to Architectures　　2.1　The goals of architecture design　　　2.1.1　Agenda　　2.2　The architectural antipodes　　　2.2.1　What makes an algorithm suitable for a dedicated VLSI architecture?　　　2.2.2　There is plenty of land between the architectural antipodes　　　2.2.3　Assemblies of general-purpose and dedicated processing units　　　2.2.4　Coprocessors　　　2.2.5　Application-specific instruction set processors　　　2.2.6　Configurable computing　　　2.2.7　Extendable instruction set processors　　　2.2.8　Digest　　　2.3 A　transform approach to VLSI architecture design　　　2.3.1　There is room for remodelling in the algorithmic domain　 62　　2.3.2　...and there is room in the architectural domain　　　2.3.3　Systems engineers and VLSI designers must collaborate　　　2.3.4　A graph-based formalism for describing processing algorithms　　　2.3.5　The isomorphic architecture　　　2.3.6　Relative merits of architectural alternatives　　　2.3.7　Computation cycle versus clock period　　2.4　Equivalence transforms for combinational computations　　　2.4.1　Common assumptions　　　2.4.2　Iterative decomposition　　　2.4.3　Pipelining　　　2.4.4　Replication　　　2.4.5　Time sharing　　　2.4.6　Associativity transform　　　2.4.7　Other algebraic transforms　　　2.4.8　Digest　　2.5　Options for temporary storage of data　　　2.5.1　Data access patterns　　　2.5.2　Available memory configurations and area occupation　　　2.5.3　Storage capacities　　　2.5.4　Wiring and the costs of going off-chip　　　2.5.5　Latency and timing　　　2.5.6　Digest　　2.6　Equivalence transforms for nonrecursive computations　　　2.6.1　Retiming　　　2.6.2　Pipelining revisited　　　2.6.3　Systolic conversion　　　2.6.4　Iterative decomposition and time-sharing revisited　　　2.6.5　Replication revisited　　　2.6.6　Digest　　2.7　Equivalence transforms for recursive computations　　　2.7.1　The feedback bottleneck　　　2.7.2　Unfolding of first-order loops　　　2.7.3　Higher-order loops　　　2.7.4　Time-variant loops　　　2.7.5　Nonlinear or general loops　　　2.7.6　Pipeline interleaving is not an equivalence transform　　　2.7.7　Digest　　2.8　Generalizations of the transform approach　　　2.8.1　Generalization to other levels of detail　　　2.8.2　Bit-serial architectures　　　2.8.3　Distributed arithmetic　　　2.8.4　Generalization to other algebraic structures　　　2.8.5　Digest　　2.9　Conclusions　　　2.9.1　Summary　　　2.9.2　The grand architectural alternatives from an energy point of view　　　2.9.3　A guide to evaluating architectural alternatives　　2.10　Problems　　2.11　Appendix I: A brief glossary of algebraic structures　　2.12　Appendix II: Area and delay figures of VLSI subfunctions　Chapter 3　Functional Verification　Chapter 4　Modelling Hardware with VHDL　Chapter 5　The Case for Synchronous Design　Chapter 6　Clocking of Synchronous Circuits　Chapter 7　Acquisition of Asynchronous Data　Chapter 8　Gate- and Transistor-Level Design　Chapter 9　Energy Efficiency and Heat Removal　Chapter 10　Signal Integrity　Chapter 11　Physical Design　Chapter 12　Design Verification　Chapter 13　VLSI Economics and Project Management　Chapter 14　A Primer on CMOS Technology　Chapter 15　Outlook　Appendix A　Elementary Digital Electronics　Appendix B　Finite State Machines　Appendix C　VLSI Designer’s Checklist　Appendix D　Symbols and constants　References　Index　

章節(jié)摘錄

　　From Algorithms to Architectures　　2．1 The goals of architecture design　　VLSI architecture design is concerned with deciding on the necessary hardware resources for solving problems from data and／or signal processing and with organizing their interplay in such a way as to meet target specifications defined by marketing． The foremost concern is to get the desired functionality right．The second priority is to meet some given performance target j often expressed in terms of data throughput or operation rate．A third objective，of economic nature this timej is to minimize production costs．Assuming a given fabrication process，this implies minimizing circuit size and maximizing fabrication yield SO as to obtain as many functioning parts per processed wafer as possible．　　Another general concern in VLSI design is energy efficiency．Battery-operated equipment，such as hand-held cellular phones，laptop computers，digital hearing aids； etc．，obviously imposes stringent limits on the acceptable power consumption．It is perhaps less evident that energy efficiency is also of interest when power gets supplied from the mains．The reason for this is the cost of removing the heat generated by high．performance high-density ICs．While the VLSI designer is challenged to meet a given performance figure at minimum power in the former case，maximizing performance within a limited power budget is what is sought in the latter．　　The ability to change from one mode of operation to another in very little time，and the flexibility to accommodate evolving needs and／or to upgrade to future standards are other highly desirable qualities and subsumed here under the term agility．Last but not least，two distinct architectures are likely to differ in terms of the overall engineering effort required to work them out in full detail and，hence also，in their respective times to market．

編輯推薦

　　今天，集成電路設(shè)計(jì)技術(shù)高速發(fā)展，在各個(gè)領(lǐng)域得到廣泛應(yīng)用，已經(jīng)成為一種橫跨多學(xué)科的技術(shù)。《數(shù)字集成電路設(shè)計(jì)：從VLSI體系結(jié)構(gòu)到CMOS制造(英文版)》從架構(gòu)與算法講起，介紹了功能驗(yàn)證、VHDL建模、同步電路設(shè)計(jì)、異步數(shù)據(jù)獲取、能耗與散熱、信號(hào)完整性、物理設(shè)計(jì)、設(shè)計(jì)驗(yàn)證等必備技術(shù)，還講解了VLSI經(jīng)濟(jì)與項(xiàng)目管理，并簡(jiǎn)單闡釋了CMOS技術(shù)的基礎(chǔ)知識(shí)，全面覆蓋了數(shù)字集成電路的整個(gè)設(shè)計(jì)開發(fā)過程。　　作為一本教科書，《數(shù)字集成電路設(shè)計(jì)：從VLSI體系結(jié)構(gòu)到CMOS制造(英文版)》向工程專業(yè)學(xué)生展示了數(shù)字VLSl設(shè)計(jì)之美。揭示了各種技術(shù)難點(diǎn)，使他們避免重復(fù)前人的錯(cuò)誤；作為一本技術(shù)參考書，《數(shù)字集成電路設(shè)計(jì)：從VLSI體系結(jié)構(gòu)到CMOS制造(英文版)》內(nèi)容全面，豐富的表格、清單、電路圖和個(gè)案研究能夠幫助正在開發(fā)硬件電路的在職工程師更好地完成自己的設(shè)計(jì)?！　　稊?shù)字集成電路設(shè)計(jì)：從VLSI體系結(jié)構(gòu)到CMOS制造(英文版)》特點(diǎn)　　·涵蓋了數(shù)字VLSI設(shè)計(jì)的大部分問題　　·從算法設(shè)計(jì)到晶圓生產(chǎn)，以自頂向下方式一一講述　　·重點(diǎn)闡釋了流行的CMOS技術(shù)和靜態(tài)電路　　·全面覆蓋數(shù)字VLSI設(shè)計(jì)者需要知道的半導(dǎo)體物理知識(shí)　　·圖文并茂，深度體現(xiàn)課堂教學(xué)和實(shí)際設(shè)計(jì)項(xiàng)目驗(yàn)證的思想

圖書封面

圖書標(biāo)簽Tags

無

評(píng)論、評(píng)分、閱讀與下載

---

    數(shù)字集成電路設(shè)計(jì) PDF格式下載

---