數(shù)字設計

內容概要

芯片技術的發(fā)展使IT界的“摩爾定律”一次次閃耀出智慧的光芒，數(shù)字電路的設計技術同樣更是不斷地獲得突破。使學生能跟上“摩爾定律”，掌握先進的設計技術，正是本書的目的與特色。本書內容翔實，基本原理描述清晰準確，設計實例豐富全面，適合設計、構建數(shù)字電路的各個層次的讀者選用。本書立足于數(shù)字設計相對穩(wěn)定的基本原理，這些原理包括組合邏輯、時序邏輯和狀態(tài)機等。作者將這些原理與體現(xiàn)當前先進設計技術的工具和設計技巧有機地結合起來，包括如何使用ABEL和VHDL設計語言；如何進行結構化設計；如何通過可編程邏輯器件來實現(xiàn)最終的設計等。全書共分十一章，內容涵蓋了基本原理，組合與時序邏輯設計的原理、實踐和實例，以及當前的發(fā)展狀況。本書圖文并茂，寫作風格簡潔、明了，更有富于指導意義的練習題?！　”緯勺鳛殡娮印⒂嬎銠C專業(yè)本科及研究生學習數(shù)字邏輯設計的入門教材，也可作為工程技術人員的參考書。    內容：1. 導論 2. 數(shù)制與編碼 3. 數(shù)字電路 4. 組合邏輯設計原理 5. 組合邏輯設計實踐 6. 組合電路設計實例 7. 時序邏輯設計原理 8. 時序邏輯設計實踐 9. 時序電路設計示例 10. 內存、復雜可編程邏輯器件和現(xiàn)場可編程門陣列 11. 其他應用領域

書籍目錄

FOREWORD PREFACE 1 INTRODUCTION   1.1 About Digital Design   1.2 Analog versus Digital   1.3 Digital Devices   1.4 Electronic Aspects of Digital Design    1.5 Software Aspects of Digital Design   1.6 Integrated Circuits   1.7 Programmable Logic Devices   1.8 Application-Specific ICs   1.9 Printed-Circuit Boards   1.10 Digital-Design Levels   1.11 The Name of the Game   1.12 Going Forward   Drill Problems 2 NUMBER SYSTEMS AND CODES   2.1 Positional Number Systems   2.2 Octal and Hexadecimal Numbers   2.3 Genera f Positional-Number-System Conversions   2.4 Addition and Subtraction of Nondecimal Numbers   2.5 Representation of Negative Numbers 　　2.5.1 Signed-Magnitude Representation　　2.5.2 Complement Number Systems　　2.5.3 Radix-Complement Representation　　2.5.4 Two's-Complement Representation　　2.5.5 Diminished Radix-Complement Representation　　2.5.6 Ones' -Con1Plement Representation　　2.5.7 Excess R6Presentations  2.6 Two's-Complement Addition and Subtraction 　　2.6.1 Addition Rules　　2.6.2 A Graphical View　　2.6.3 Overflow　　2.6.4 Subtraction Rules 　　2.6.5 Two's-Complement and Unsigned Binary Numbers  2.7 Ones'-Complement Addition and Subtraction   2.8 Binary Multiplication   2.9 Binary Division   2.10 Binary Codes for Decimal Numbers   2.11 Gray Code   2.12 Character Codes   2.13 Codes for Actions, Conditions, and States   2.14 n-Cubes and Distance   2.15 Codes for Detecting and Correcting Errors 　　2.15.1 Error-Detecting Codes　　2.15.2 Error-Correcting and Multiple-Error-Detecting Codes　　2.15.3 Hamming Codes　　2.15.4 CRC Codes　　2.15.5 Two-Dimensional Codes 　　2.15.6 Checksum Codes　　2.15.7 m-out-Of-n Codes  2.16 Codes for Serial Data Transmission and Storage 　　2.16.1 Parallel and Serial Data 　　2.16.2 Serial Line Codes  References   Drill Problems   Exercises 3 DIGITALCIRCUITS   3.1 Logic Signals and Gates   3.2 Logic Families   3.3 CMOS Logic 　　3.3.1 CMOS Logic Levels 　　3.3.2 MOS Transistors　　3.3.3 Basic CMOS Inverter Circuit　　3.3.4 CMOS NAND and NOR Gates 　　3.3.5 Fan-in　　3.3.6 Noninverting Gates　　3.3.7 CMOS AND-OR-INVERT and OR-AND-INVERT Gates  3.4 Electrical Behavior of CMOS Circuits 　　3.4.1 Overview　　3.4.2 Data Sheets and Specifications  3.5 CMOS Steady-State Electrical Behavior 　　3.5.1 Logic Levels and Noise Margins　　3.5.2 Circuit Behavior with Resistive Loads　　3.5.3 Circuit Behavior with Nonideal inputs 　　3.5.4 Fanout　　3.5.5 Effects of Loading　　　　3.5.6 Unused Inputs　　3.5.7 Current Spikes and Decoupling Capacitors　　3.5.8 How' to Destroy a CMOS Device  3.6 CMOS Dynamic Electrical Behavior 　　3.6.1 Transition Time 　　3.6.2 Propagation Delay　　3.6.3 Power Consumption  3.7 Other CMOS Input and Output Structures 　　3.7.1 Transmission Gates　　　3.7.2 Schmitt-Trigger Inputs　　3.7.3 Three-State Outputs 　　3.7.4 Open-Drain Outputs　　3.7.5 Driving LEDs 　　3.7.6 Multisource Buses 　　3.7.7 Wired Logic　　3.7.8 Pull-Up Resistors  3.8 CMOS Logic Families 　　3.8.1 HC and HCT 　　3.8.2 VHC and VHCT    3.8.3 HC, HCT, VHC, and VHCT Electrical Characteristics　　3.8.4 FCT and FCT-T　　3.8.5 FCT-T Electrical Characteristics  3.9 Bipolar Logic 　　3.9.1 Diodes　　　　3.9.2 Diode Logic　　3.9.3 Bipolar junction Transistors 　　3.9.4 Transistor Logic Inverter　　3.9.5 Schottky Transistors4 COMBINATIONAL LOGIC DESIGN PRINCIPLES 5 COMBINATIONAL LOGIC DESIGN PRACTICES 6 COMBINATIONAL-CIRCUIT DESIGN EXAMPLES 7 SEQUENTIAL LOGIC DESIGN PRINCIPLES 8 SEQUENTIAL LOGIC DESIGN PRACTICES 9 SEQUENTIAL-CIRCUIT DESIGN EXAMPLES 10 MEMORY, CPLDS, AND FPGAS 11 ADDITIONAL REAL-WORLD TOPICS INDEX

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